Atomera (ATOM): Recent Blogs and White Papers point out huge benefits for the Big Three (TSMC, Samsung, Intel) in Leading Edge Fabs

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Intel’s Robin Zhang
  • White Paper: MST® Benefits DRAM Sense Amplifiers
  • Robert Mears & Jeff Lewis, Atomera Incorporated
  • September 27th, 2023
  • https://atomera.com/white-paper-mst-benefits-for-dram-sense-amplifiers/
  • Longer DRAM refresh interval: DRAM bitcells must be refreshed when the charge onthe (worst) capacitor leaks sufficiently that a ‘1’ cannot reliably be read. Refresh consumes significant power – some studies show it consumes 30% of the total DRAM power budget, and 10-13% of total server power. A better sense margin enables a longer interval between refreshes, reducing power proportionally, possibly by 50% or more!
DRAM WHITEPAPER
  • In-person presentation of San Jose State’s and Atomera’s joint poster, entitled “Cryogenic Electron Mobility and Subthreshold Slope of Oxygen-Inserted (OI) Si Channel nMOSFETs”
  • Professor Hiu Yung Wong of San Jose University, Robert J. Mears, CTO, and Hideki Takeuchi, Vice President of Engineering of Atomera Incorporated (Nasdaq: ATOM)
  • Wednesday, September 27 from 11 p.m. – Thursday, September 28 12:30 a.m. PDT, Thursday, September 28 from 3 p.m. – 4:30 p.m. JST
  • This poster presentation will discuss the new findings of the physical mechanism of why MST®
  • Atomera’s MST film improves surface-roughness scattering by 53% compared to a regular Si channel
  • MST improves Coulomb scattering, which is significant at low vertical effective field, by reducing ionized dopant impurities near the gate dielectric
  • A simple analytical formula to describe the observed mobility behaviors of the MST film has been established for compact modeling.
SISPAD Poster
  • One of the biggest challenges in semiconductors is to keep lowering power consumption as the nodes get smaller. A phenomenon that prevents them from doing so is something called random dopant fluctuation or RDF, which are variations in concentration of the implanted dopants, and the impact of those variations becomes more significant as the nodes size get smaller. 
  • The good news is that MST is very adept at mitigating the problem of RDF. Our analysis shows that in the latest gate-all-around transistors, a single dopant atom diffusing into the channel can significantly alter the transistor’s characteristics. This is why the dopant control characteristics of MST are so important for advanced node customers. 
  • So our analysis shows and gate all around transistors, which are — as you know, they’re going to be adopted by the foundries at very small process nodes, probably in the 3 and 2-nanometer level.
  • But in this case, the channel is so small that 1 or 2 Atoms moving into the channel increases the concentration of dopants in that channel significantly. And they want the channel to be as clear of dopants as they can possibly make it.
  • So by implementing MST, which really improves the chances that they won’t see random dopants going into the channel, we can bring a big improvement in reliability from that perspective and performance.
  • Atomera joins American Semiconductor Innovation Coalition (ASIC)
  • Jeff Lewis, SVP Business Devt. and Marketing April 12th, 2023
  • https://atomera.com/atomera-joins-american-semiconductor-innovation-coalition-asic/
  • Bringing to market the next generation of microelectronics technology is too complicated for one company to do on its own, requiring an innovation ecosystem of the most talented companies and resources.
  • As MST® can provide benefits across the industry from the most advanced gate-all-around (GAA) nodes to DRAM and legacy analog and power nodes, we are participating in the following ASIC workstreams
  • Materials, Metrology, Equipment, and Inspection
  • Advanced Logic
  • Memory (DRAM and NAND)
  • Analog and Mixed Signal
  • Design and EDA
New Applications for MST
  • What Designers Need To Know About GAA
  • Semiconductor Engineering 4/13/2023
  • https://semiengineering.com/what-designers-need-to-know-about-gaa/
  • By Brian Bailey with quotes from Robert Mears(CTO Atomera), Julien Ryckaert, vice president of R&D at imec, Victor Moroz, fellow in the TCAD product group of Synopsys.
  • Why are we making this change? “If finFET pitch could continue scaling, people would have stayed with finFET,” says Julien Ryckaert, vice president of R&D at imec. “The problem is finFET cannot scale simply because you need to plug the gates, work function stack, in between two fins.
Blogs
MST® Dopant Blocking for
Advanced 3D Applications
  • Atomera Blog November 12th, 2021
  • HKMG Devices Work Better With MST, Extending the CMOS Roadmap
  • https://atomera.com/hkmg-devices-work-better-with-mst-extending-the-cmos-roadmap/
  • The device benefit is that MST devices can have a lower threshold voltage for the same grown hafnium oxide thickness.
  • Intermixing reduction in ultra-thin titanium nitride/hafnium oxide film stacks grown on oxygen-inserted silicon and associated reduction of the interface charge dipole
  • https://aip.scitation.org/doi/10.1063/5.0068002
  • This discovery opens up a new technique for tuning HKMG electrical characteristics.
  • OI-Si promises significant performance boost for the end-of-roadmap planar CMOS products with HKMG stack due to its unique carrier mobility improvement,34 gate leakage reduction,34 and reduction of random dopant fluctuations.35 In addition, the newly observed interfacial charge dipole reduction opens an opportunity for OI-Si as the metal work function tuning layer in HKMG-based semiconductor products, which is particularly important for next generation non-planar CMOS.
HKMG Devices Work Better With MST, Extending the CMOS Roadmap
  • Announcing Atomera’s Latest White Paper: “MSTcad for PMIC and RF-SOI Switches”
  • April 6th, 2022
  • https://atomera.com/announcing-atomeras-latest-white-paper-mstcad-for-pmic-and-rf-soi-switches/
  • Authored by Atomera’s founder and CTO, Robert Mears and VP Engineering, Hideki Takeuchi, this document provides an overview of MST and its benefits, and describes how to model MST using MSTcad, as well as, demonstrates the significant benefits of using MST to improve PMICs or other power devices and RF-SOI switches.
  • Using wafers from Soitec, Atomera has been able to demonstrate the unique dopant retention of MST on ultra-thinned RF-SOI substrates.
  • MST enables greater than a 10x steeper SSRW profile by implanting boron into the SOI substrate after blanket MST epi growth.
MST® for PMIC and RF-SOI Switches
  • News Blog Post from Atomera Incorporated
  • Announcing Atomera’s Latest White Paper Demonstrating MST Advantages for the Most Advanced Semiconductor Processes
  • MST Advantages for the Most Advanced Semiconductor Processes
  • 8/2/22
  • https://atomera.com/mst-advantages-for-the-most-advanced-semiconductor-processes/
  • But in addition, we can now project that MST, in conjunction with HKMG, can also bring >15% higher mobility for GAA and hence higher performance metrics.
  • We expect to be able to engineer more than a typical node’s improvement in performance for a fraction of the development cost!
Smoothing the Surface: MST® Turbo-Charges GAA Devices
  • News Blog Post from Atomera Incorporated
  • White Paper: MST® Benefits for Gate-All-Around (GAA)
  • In this White Paper we outline some recent learning about Atomera’s MST® technology and how it can be used to improve advanced 3D devices, particularly gate-all-around (GAA) nanosheet devices (sometimes also called “RibbonFETs” or “Multi-Bridge Channel” (MBC) FETs).
  • 1/4/23
  • The key MST benefits for these devices are dopant diffusion control [1], improved mobility[2,3], the recently discovered work-function engineering potential of MST [4] and MST’s ability to improve contacts by reducing the Schottky-barrier height [5].
  • Summary: This White Paper will show that MST can improve GAA devices in 4 ways:
    • – Creating enhanced Punch-Through Stop (PTS) layers
      • – Improving device mobility by ~15%
        • – Enabling thinner work function metals (WFMs) that reduce stacking height by 10%
          • – Reducing overall contact resistance by 11%.
White Paper: MST® Benefits for Gate-All-Around (GAA)
Breakthrough for mobility in 10/5/3/2nm next gen fabs
  • Atomera to Present Keynote Speech at IEEE IMFEDK 2022 Conference
  • Atomera’s paper, entitled “Remote control of doping profile, silicon interface, and gate dielectric reliability via oxygen insertion into silicon channel.”
  • Wednesday, November 30 at 4:40-5:20 p.m. JST
  • Hideki Takeuchi, Robert J. Mears, Marek Hytha, Daniel Connelly, Paul E. Nicollian(Pres. Semi Rel Corp) and Hiu-Yung Wong(San Jose St)
  •  Atomera’s paper will dive into the significant impact for HKMG stack as the MST layers reduce intermixing and interfacial charge dipoles, which lowers remote charge scattering and provides viable knobs for the performance boost and new designs of future electronic devices.

Although the opportunity in legacy nodes is quite exciting for Atomera, MST technology is also very well positioned to solve problems for customers at the leading edge.

  • Adoption in older fabs or newer 28nm fabs
  • Assume 2% royalties
  • Wafer royalty $66/wafer
  • IDM piece part royalty example .09/part
  • Using 80K wafers/month
  • Wafers $64m/node
  • IDM $255m/node
  • Adoption in next generation 5/3/2nm fabs
  • Assume 2% royalties
  • Wafer royalty
    • 5nm $340/wafer
    • 3nm $500/wafer
  • Range 20k-80k wafers/month
  • 5nm wafers $81m – $326m/node
  • 3nm wafers $125m- $500m/node
  • IDM Royalties typically 4X wafer royalties per node

Any due diligence from this site is for entertainment only and not a solicitation to buy or sell Atomera stock. Any estimates are just examples of what is possible and should not be considered financial advise. I have not been compensated in any way and will never be compensated for my reports.

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